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What is the full form of VHDL?

1. Verilog Hardware Description Language b)
2. Very High speed Description Language
3. Variable Hardware Description Language
4. Very high speed Hardware Description Language

✅ Correct Answer: 4

What is the basic use of EDA tools?

1. Communication of Electronic devices
2. Fabrication of Electronics hardware c)
3. Electronic circuits simulation and synthesis
4. Industrial automation

✅ Correct Answer: 3

After compiling VHDL code with any EDA tool, we get __________

1. Final device
2. FPGA
3. Optimized netlist
4. Netlist

✅ Correct Answer: 4

Which of the following is not an EDA tool?

1. Visual C++
2. Quartus II
3. Xilinx ISE
4. MaxPlus II

✅ Correct Answer: 1

he process of transforming a design entry information of the circuit into a set of logic equations in any EDA tool is known as _________

1. Simulation
2. Optimization
3. Synthesis
4. Verification

✅ Correct Answer: 2

An Antifuse programming technology is associated with _________

1. CPLDs
2. FPGAs
3. SPLDs
4. ASICs

✅ Correct Answer: 2

Which of the following is not a back end EDA tool?

1. Floor planning tools
2. Placement tools
3. Routing tools
4. Simulators

✅ Correct Answer: 4

What are the differences between simulation tools and synthesis tool?

1. Simulators are used to check the performance of circuit and Synthesis tools are for the fabrication of circuits
2. Simulators and Synthesis tools works exactly same
3. Simulators are used just to check basic functionality of the circuit and Synthesis tools includes timing constraints and other factors along with simulation
4. Simulation finds the error in the code and Synthesis tool corrects the code

✅ Correct Answer: 3

What is the extension of the netlist file; input to the place and route EDA tools?

1. EIDF
2. SDF
3. TXT
4. CPP

✅ Correct Answer: 1

In what aspect, HDLs differ from other computer programming languages?

1. No aspect; both are same
2. HDLs describe hardware rather than executing a program on a computer
3. HDLs describe software and not hardware
4. Other computer programming languages have more complexity

✅ Correct Answer: 2

Which of the following HDLs are IEEE standards?

1. VHDL and Verilog
2. C and C++
3. Altera and Xilinx
4. Quartus II and MaxPlus II

✅ Correct Answer: 1

Why we needed HDLs while having many traditional Programming languages?

1. Traditional programming languages are complex
2. HDLs are complementary to traditional programming languages to complete the design process
3. Some characteristics of digital hardware couldn’t be captured by traditional languages
4. HDLs offer more complexity than traditional programming languages.

✅ Correct Answer: 3

Why do we need concurrent processing for describing digital systems in HDLs?

1. Faster processing than conventional programming languages
2. Concurrent processing is easier than sequential processing
3. It allows taking timing constraints into consideration
4. Complexity of digital systems needs concurrent processing

✅ Correct Answer: 4

VHDL is based on which of the following programming languages?

1. ADA programming language
2. C
3. Assembly
4. PHP

✅ Correct Answer: 1

What is the advantage of using VHDL instead of any other HDL?

1. Week typing
2. Based on ADA
3. Portability
4. Easy to code

✅ Correct Answer: 3

Which of the following is a characteristic of VHDL?

1. Case sensitive
2. Use of simple data types
3. Based on C programming language
4. Strongly typed language

✅ Correct Answer: 4

Which of the following is a characteristic of Verilog HDL?

1. Strongly typed language
2. Case sensitive
3. Better library
4. Not portable

✅ Correct Answer: 2

Which of the following is the basic building block of a design?

1. Architecture
2. Entity
3. Process
4. Package

✅ Correct Answer: 2

A package in VHDL consists of _________

1. Commonly used architectures
2. Commonly used tools
3. Commonly used data types and subroutines
4. Commonly used syntax and variables

✅ Correct Answer: 3

Complete description of the circuit to be designed is given in _________

1. Architecture
2. Entity
3. Library
4. Configurations

✅ Correct Answer: 1

Complete description of the circuit to be designed is given in _________

1. Architecture
2. Entity
3. Library
4. Configurations

✅ Correct Answer: 1

What is the use of the Configuration statement?

1. To configure the components exactly in design
2. To complete the design process by adding libraries
3. To add more than one entities into a single architecture
4. To add some component in any entity architecture pair

✅ Correct Answer: 4

In VHDL, Bus is a type of ________

1. Signal
2. Constant
3. Variable
4. Drive

✅ Correct Answer: 1

What is the use of Generics in VHDL?

1. To turn on and off the drivers
2. To pass information to the entity
3. To describe architecture
4. To divide code into small processes

✅ Correct Answer: 2

Predefined data for an VHDL object is called ________

1. Generic
2. Constant
3. Attribute
4. Library

✅ Correct Answer: 3

Which of the following describes the structure of VHDL code correctly?

1. Library Declaration; Entity Declaration; Architecture Declaration; Configurations
2. Entity Declaration; Configuration; Library Declaration; Architecture Declaration
3. Configuration; Library Declaration; Entity Declaration; Architecture Declaration
4. Library Declaration; Configuration; Entity Declaration; Architecture Declaration

✅ Correct Answer: 1

Which of the following is used at the end of a statement?

1. ; (Semicolon)
2. — ( double hyphen)
3. _ (underscore)
4. No sign is used at the end of statement

✅ Correct Answer: 1

Which of the following is not defined by the entity?

1. Direction of any signal
2. Names of signal
3. Different ports
4. Behavior of the signals

✅ Correct Answer: 4

Which of the following can be the name of an entity?

1. NAND
2. Nand_gate
3. Nand gate
4. AND

✅ Correct Answer: 2

Refer to the VHDL code given below, how many input-output pins are there in MUX entity? ENTITY mux IS Port ( a,b : IN STD_LOGIC; Y : OUT STD_LOGIC); END mux;

1. 5
2. 4
3. 3
4. 2

✅ Correct Answer: 3

Which of the following mode of the signal is bidirectional?

1. IN
2. OUT
3. INOUT
4. BUFFER

✅ Correct Answer: 3

In an assignment statement, OUT signal can be used only to the ___________

1. Left of <= operator
2. Right of <= operator
3. Any side of <= operator
4. Right of := operator

✅ Correct Answer: 1

On which side of assignment operator, we can use the IN type signal?

1. Left
2. Right
3. Both
4. Can’t be used

✅ Correct Answer: 2

What is the difference between OUT and BUFFER?

1. BUFFER can’t be used inside the entity for reading the value and OUT can be
2. BUFFER can only be read whereas OUT can only be assigned a value
3. BUFFER can be read as well as assigned a value but OUT can only be assigned
4. Both are same

✅ Correct Answer: 3

Which of the following can have more than one driver?

1. IN
2. OUT
3. INOUT
4. BUFFER

✅ Correct Answer: 3

Which of the following is the default mode for a port variable?

1. IN
2. OUT
3. INOUT
4. BUFFER

✅ Correct Answer: 1

What does the architecture of an entity define?

1. External interface
2. Internal functionality
3. Ports of the entity
4. Specifications

✅ Correct Answer: 2

What does the declarative part of architecture contain?

1. Declaration of another entity
2. Declaration of libraries and packages
3. Declaration of local signals, constants or subprograms
4. Declaration of Architecture type

✅ Correct Answer: 3

The statements in between the keyword BEGIN and END are called _______

1. Concurrent statements
2. Netlist
3. Declaration statement
4. Entity function

✅ Correct Answer: 1

Which of the following can be the name of an architecture?

1. arch 1
2. 1arch
3. arch_1
4. architecture

✅ Correct Answer: 3

Which of the following can’t be declared in the declaration part of the architecture?

1. Signals
2. Subprograms
3. Components
4. Libraries

✅ Correct Answer: 4

Which of the following statements execute faster?

1. Sequential statements
2. Concurrent statements
3. Declaration statements
4. Loop statements

✅ Correct Answer: 2

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